The present invention relates to a sequence controlling method for processing a sequence program (flowchart of a ladder circuit).
FIG. 2 shows an example of a sequence circuit for explaining the present invention and a prior art technique. FIG. 3 shows an example of a ladder circuit in the case where the sequence circuit of FIG. 2 is arranged by a sequence program (ladder circuit) in the prior art technique.
A conventional sequence controller assumes the processing form as shown in FIG. 3 in respect to the sequence circuit of FIG. 2 to process the sequence program (ladder circuit).
More particularly, when the sequence circuit includes a circuit in which an output constitutes an input condition for another output, the sequence program (ladder circuit) is divided into two or more ladder circuits as shown in FIG. 3 to process the sequence program.
With the above processing form, however, when the sequence circuit as shown in FIG. 2 is processed, the same address must be accessed twice in the processing of the ladder circuit. This is one of the factors resulting in reduced processing speed in the sequence control which requires a high-speed processing.
Further, since the same address is accessed twice, the number of program steps is also increased and a large memory capacity for storing a sequence program is also required.